In recent years, the size of computer programs have outgrown the main memory available in computers. To accommodate very large programs in a limited amount of physical memory, virtual memory was created. Virtual memory defines a large virtual address space that a program is allowed to run in. The virtual memory is divided into blocks of memory known as pages. A subset of the virtual memory pages are mapped onto physical memory pages. To create a large virtual address space, only a limited number of the virtual memory pages are mapped into a short term physical memory such as dynamic RAM. The remainder of the virtual memory pages are mapped onto long term storage such as hard disk drives.
Furthermore, virtual memory simplifies the implementation of multitasking operating systems. Each process in the multitasking system is allocated a limited number of the available physical memory pages. However, each process is given a large virtual address space wherein a subset of the virtual memory pages are mapped onto the allocated physical memory pages. The remainder of the virtual memory pages are mapped to long term storage.
Virtual memory systems are usually implemented with the use of a "page table." A page table is a data structure that is indexed using a virtual page address to retrieve a physical page address. Thus, when a program accesses memory using a virtual address, the operating system or the hardware examines the page table to translate the virtual page address into a physical memory page address. Then, using the physical address, the memory location is accessed.
Page tables are usually stored in main memory. To reduce the time required to perform virtual memory address to physical memory address translations, many computer processors implement a Translation Look-Aside Buffer (TLB). A translation look-aside buffer is a high speed cache that is dedicated to performing translations from virtual memory addresses into physical memory addresses.
Some processors implement virtual memory systems that have more than one size of page. For example, in the Intel Microprocessor Architecture, supports both 4 kilobyte pages and 4 Megabyte pages. It would therefore be desirable to have a fully associative translation look-aside buffer that supports more than one size of memory pages.